Field of the Invention
The present invention relates to a step-up DC/DC converter.
Description of the Related Art
In order to generate a voltage that is higher than the input voltage, a step-up DC/DC converter (switching regulator) is employed. FIG. 1 is a circuit diagram showing a typical configuration of a step-up DC/DC converter 100r. The step-up DC/DC converter 100r includes an inductor L1, an output capacitor C1, a switching transistor M1, a rectifier diode D1, and a control circuit 2r. 
The control circuit 2r is configured in the form of a package, which is mounted on a common printed circuit board (PCB) on which the inductor L1, the rectifier diode D1, and the output capacitor C1 are also mounted. The switching transistor M1 is integrated on a semiconductor chip 4 included in the control circuit 2r. 
The voltage (output voltage) VOUT at the output terminal POUT is divided by resistors R1 and R2, and the voltage thus divided is fed back to a voltage detection terminal VS of the control circuit 2r. The control circuit 2r controls the switching of the switching transistor M1 such that the feedback voltage VS approaches a predetermined target voltage VREF.
The semiconductor chip 4 included in the control circuit (package) 2r includes a pulse modulator 10, a driver 12, and a transmission path 14, in addition to the switching transistor M1.
The pulse modulator 10 adjusts the duty ratio of the pulse signal SPWM, i.e., its output signal, such that the feedback voltage VS approaches the predetermined target voltage VREF. The driver 12 drives the switching transistor M1 according to the pulse signal SPWN. Related techniques have been disclosed in Japanese Patent Application Laid Open No. 2009-55708, for example.
The present inventors have investigated the DC/DC converter 100r shown in FIG. 1, and have come to recognize the following problem.
In the DC/DC converter 100r shown in FIG. 1, there are parasitic inductances LPKG1 and LPKG2 within the control circuit 2r configured as a semiconductor package, and there is a parasitic inductance LSUB and a parasitic resistance RSUB on the printed circuit board mounting the control circuit 2r. 
In the off period of the switching transistor M1, the rectifier diode D1 is biased in the forward direction by means of the electromotive force generated by the coil. In this state, charge is accumulated in the rectifier diode D1. Subsequently, after the switching transistor M1 transits to on, the charge stored in the rectifier diode D1 flows toward the switching transistor M1 due to the reverse recovery property of the rectifier diode D1. The charge flows to the ground of the printed circuit board via the switching transistor M1. That is to say, during the reverse recovery time TRR of the rectifier diode, the rectifier diode D1 can be regarded as a capacitance COJ.
Thus, during the reverse recovery time TRR, a loop including the output capacitor C1, the rectifier diode D1, the switching transistor M1, and the ground line forms a series RLC resonance circuit. It should be noted that the capacitance value of the output capacitor C1 is sufficiently large as compared with the capacitance COJ of the rectifier diode D1. Thus, with such a series connection with the rectifier diode D1, the effect of the capacitance value of the output capacitor C1 is negligible.
In the on state of the switching transistor M1, ideally, the voltage (which is also referred to as the “switching voltage) VSW at the switching (SW) terminal is 0 V. However, in some cases, immediately after the transition to the on state, the switching voltage VSW and the output voltage VOUT oscillate at a resonance frequency ωo=1/√(LC) [rad] of the RLC resonance circuit.L≈LPKG1+LPKG2+LSUB C≈COJ 
The oscillation of the switching voltage VSW and/or the output voltage VOUT is emitted to the outside in the form of electromagnetic noise. Thus, in a case in which the resonance frequency ωo is within a frequency band to be controlled as specified by an EMI standard, an EMI countermeasure must be applied. Typical examples of conceivable EMI countermeasures include: a method in which the circuit is covered by an electromagnetic shielding material; a method in which the value of the inductor L1 is adjusted; and the like. However, such methods lead to an increased cost, and require such adjustments to be repeatedly performed by means of a trial and error approach.